The ams OSRAM Group is a global leader in innovative light and sensor solutions. With more than 110 years of industry experience, we combine engineering excellence and global manufacturing with a passion for cutting-edge innovation enabling
ams OSRAMs LSP unit is seeking a Verification Leader to define strategies for broadband optical IC verification and to guide high-speed datapath development. You will lead block- and chip-level verification, drive coverage closure, coordinate cross-functional debug, and
We are LSP – Light Sensors & Photonics, one of three business units within ams OSRAM, advancing the digitalization of light. At LSP, we go beyond traditional sensing—combining light, silicon, and system expertise to enable digital
Your tasks Verification leader responsible for defining verification strategies for broadband optical communication ICs, including high-frequency mixed-signal interfaces and high-speed digital datapaths Define verification methodologies and plans Lead block and chip-level verification Drive coverage closure and quality
Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring
Overview As a Design Engineer in the NVEG group, you own the development of NAND logic features from architecture to RTL and post-silicon validation. You translate system requirements into micro-architecture and robust digital implementations, and drive
ams OSRAM in Pavia, Lombardy, Italy seeks a Principal HF Verification Engineer (d/m/f) to lead verification of broadband optical ICs, focusing on high-frequency mixed-signal interfaces and high-speed datapaths. You will define verification strategies, drive coverage, mentor engineers,
p sectionh3Your tasks /h3 p ul liVerification leader responsible for defining verification strategies for broadband optical communication ICs, including high-frequency mixed-signal interfaces and high-speed digital datapaths /li liDefine verification methodologies and plans /li liLead block and chip-level