Job Description Renesas is seeking a Senior Analog IC Design Engineer for our Power Product Group, Performance Computing Power Team in Catania (Italy). Reporting to the Director of Engineering, you will have responsibility for the design,
Central Hardware Engineering Institute (CHEI) at Huawei Milan Research Center focuses on advanced hardware technologies for next-generation ICT systems, with strong emphasis on high-speed interconnects, signal integrity (SI), and system-level performance optimization. The team develops both
Statistician with Python - Freelance AI Trainer This opportunity is only for candidates currently residing in the specified country. Your location may affect eligibility and rates. Please submit your resume in English and indicate your level
Experteer Overview In this role you will develop new plastic color solutions across Celanese resins, including engineered thermoplastics and elastomers, to meet automotive, consumer and electronics market needs. You will collaborate with cross‑functional teams to translate
Offer Description Future lunar, Martian, and deep-space missions will require advanced materials capable of withstanding extreme conditions over long‑duration missions, including intense radiation, large temperature variations, and prolonged exposure to harsh environments. This PhD project aims
About the job Senior Programme Manager — JPEG Observatory 1. Position Job Title: Senior Programme Manager — JPEG Observatory Team / Vertical: Solutions — Economics and Growth Reporting To: Lead, Solutions Works closely with: Scientific Director;
Offer Description The Italian Institute of Artificial Intelligence (AI4I) invites applications for a Postdoctoral Researcher to join the newly established Crypto4AI Lab, under the supervision of Dr. Tamer Mour. Deadline 31 July 2026 Applications will be
Central Hardware Engineering Institute (CHEI) at Huawei Milan Research Center focuses on advanced hardware technologies for next-generation ICT systems, with strong emphasis on high-speed interconnects, signal integrity (SI), and system-level performance optimization. The team develops both
Synthetic Aperture Radar (SAR) Interferometry and Tomography research group Organisation / Company University of Pisa Department Department of Information Engineering Laboratory Synthetic Aperture Radar (SAR) Interferometry and Tomography research group Is the Hosting related to staff
Central Hardware Engineering Institute (CHEI) at Huawei Milan Research Center focuses on advanced hardware technologies for next-generation ICT systems, with strong emphasis on high-speed interconnects, signal integrity (SI), and system-level performance optimization. The team develops both
Position code 12826 Researchers in Paleoclimate Modelling for Environment–Society Dynamics Deadline: May 31st, 2026 What We Are Looking For We are seeking two highly motivated researchers to join the climate team of the ERC Synergy Grant
Head of Research & Development – Mobility & Transport Planning To strengthen our Research & Development Department, we are seeking a highly motivated and experienced Head of Research & Development to lead and coordinate innovative research
Organisation/Company Università Degli Studi di Napoli Federico II Research Field Other Researcher Profile Recognised Researcher (R2) Leading Researcher (R4) First Stage Researcher (R1) Established Researcher (R3) Application Deadline 21 Jul 2026 - 12:00 (UTC) Country Italy
Job Overview With appropriate support and guidance: prepare analysis plans and write detailed specifications for analysis files, tables, listings and figures, interpret analyses and write statistical sections of study reports. Develop and maintain programs to meet internal
CMCC Position cod. 12826 Researchers in Paleoclimate Modelling for Environment–Society Dynamics Deadline: May 31st 2026 WHAT WE ARE LOOKING FOR We are seeking two highly motivated researchers to join the climate team of the ERC Synergy
CMCC Position cod. 12826 Researchers in Paleoclimate Modelling for Environment–Society Dynamics Deadline: May 31st 2026 WHAT WE ARE LOOKING FOR We are seeking two highly motivated researchers to join the climate team of the ERC Synergy
Senior Analog IC Design Engineer Renesas is seeking a Senior Analog IC Design Engineer for our Power Product Group, Performance Computing Power Team in Catania (Italy). Reporting to the Director of Engineering, you will have responsibility
IT Assistant/FinOps (RIF. FINOPS- ) Creating reports and metrics to provide visibility on expenses and trends; Identifying opportunities to optimize costs and resource usage without compromising performance and security; Promoting a culture of responsibility and cost
CMCC Position cod. 12826 Researchers in Paleoclimate Modelling for Environment–Society Dynamics Deadline: May 31st, 2026 WHAT WE ARE LOOKING FOR We are seeking two highly motivated researchers to join the climate team of the ERC Synergy
IT Assistant/FinOps (RIF. FINOPS- ) Creating reports and metrics to provide visibility on expenses and trends; Identifying opportunities to optimize costs and resource usage without compromising performance and security; Promoting a culture of responsibility and cost